The present invention relates to switching circuits, and more particularly, to a current sensing bi-directional switching circuit and even more particularly, to a current sensing bi-directional switching circuit for plasma display applications. The present invention relates to a current sensing bi-directional switch and a sustain driver circuit for plasma display devices using the bidirectional switch.
Plasma display devices are gaining popularity because they are flat screen display devices. Currently, plasma display panel (PDP) devices are used for many display applications including television monitors and receivers and computer monitors. In a plasma display device of the AC type, an AC voltage, typically of approximately 180 volts, is provided to the display device. When the display device discharges it can only do so for a limited period of time. In order to sustain the discharge, an AC signal can be provided to the PDP device to sustain the discharge. A PDP device is essentially capacitive, so it is necessary to quickly provide the alternating current voltage to the PDP to sustain the discharge. Accordingly, the PDP must be charged and discharged repeatedly with the AC signal which reverses the voltage across the PDP at a periodic rate.
Currently, typical PDP sustain drivers utilize at least two capacitors to store a charge developed across the PDP from the B plus voltage and a number of transistor switches and diodes as well as at least two inductors to periodically reverse the charge across the PDP.
Typically, such PDP sustain drivers incorporate a full bridge driver, two inductors and two additional switching circuits connected to charge storage capacitors to store the charge and allow it to be reversed.
With reference to FIG. 1, a typical prior art PDP sustain driver is shown. The PDP device, being primarily capacitive, is indicated by the capacitor Cp. The capacitor Cp is connected to the outputs of a full bridge driver 10 comprising transistors Q3, Q4, Q7 and Q8. The full bridge driver is connected between the B plus source, typically 170 to 180 volts DC and ground. The full bridge driver outputs, which are connected across the PDP device indicated by Cp, are also connected through inductors L1 and L2 to respective charge storage circuits 12 and 14. Once charge storage circuit 12 comprises transistors Q1 and Q2, diodes D1 and D2 and the charge storage capacitor C1. The other charge storage circuit 14 comprises transistors Q5 and Q6, diodes D3 and D4 and the charge storage capacitor C2. In addition, diodes D5, D6, D7 and D8 are also needed. The circuit shown in FIG. 1 thus comprises eight transistors, eight diodes, two inductors and two charge storage capacitors.
In the circuit of FIG. 1, the AC plasma display panel (ACPDP) employs the full bridge driver 10 to alternately impose a positive and a negative voltage on the panel (Cp) and sustain the image for a predetermined length of time. Since the PDP is a capacitive load, high peak currents are forced to flow in the switches comprising the full bridge, which can results in excessive losses, thereby reducing system efficiency. To reduce such losses and peak currents, the PDP sustain circuit as shown in FIG. 1 uses charge storage and recovery circuitry to reduce the peak currents.
With reference to FIG. 1, the cycle operates as follows: Initially, the panel Cp is charged in the positive direction as shown in FIG. 1 from the bus voltage source. Transistors Q2 an Q8 are initially turned on. The charge from Cp is transferred to capacitor C1 through inductor L1, diode D2, transistor Q2 and transistor Q8. Q2 and Q8 are then turned off. Q5 and Q4 are then turned on. With these transistors turned on the PDP indicated by Cp will now charge in the reverse direction from the charge stored on capacitor C2 via transistor Q5, diode D3 inductor L2 and transistor Q4. Cp is now charged in the reverse direction and Q5 is turned off. Transistor Q7 is then turned on and capacitor Cp is charged to the full bus voltage through transistor Q7 as well as transistor Q4 which is still turned on. Q7 is then turned off after a predetermined time and the PDP Cp is now fully charged in the reverse direction. Transistor Q6 is then turned on while transistor Q4 is still on. The charge on Cp is transferred to capacitor C2 via L2, D4, Q6 and Q4.
Transistors Q1 and Q8 are then turned on. The charge present on C1 is then transferred to Cp thereby again charging the panel in the opposite direction. The charge on capacitor C1 is transferred to Cp via transistor Q1, diode D1, inductor L1 and transistor Q8. At this point transistor Q4 is off. Transistor Q1 is now turned off and Q3 is turned on while Q8 remains on, thereby fully charging the plasma display panel capacitance to the full bus voltage in the initial direction. Q3 is then turned off after a predetermined time and the cycle repeats again so that Q2 and Q8 are turned on transferring the charge to capacitor C1 as previously described.
Components Q1, Q2, D1 and D2 serve as the bidirectional switch which transfers charge from Cp to C1 and back to Cp. Similarly, components Q5, Q6, D3 and D4 serve to transfer the charge between Cp and C2. These transistors are driven by half bridge drivers for example IR-2110 or IR-2113 half bridge drivers. The inductors L1 and L2 are required to ensure that most of the charge is transferred. In the absence of these inductors, only half of the charge will be transferred in either direction. Transferring most of the charge is highly desirable since a low voltage differential between Cp and the bus voltage will results in lower peak currents flowing through the fall bridge switches, reducing losses. The timing for the transfer is also critical. It has to be a sufficient length such that the current in the inductor is near zero, as this ensures that maximum charge is transferred in either direction. FIGS. 2 and 3 show a simulation of major components in the prior art bidirectional switch. As apparent, the voltage across C1 is at its maximum i.e., most of the charge has been transferred, when the voltage across Cp is minimum and the current in the inductor L1 is zero. Component and timing variations will inevitably cause a residual current to be present in the inductor at the end of the transfer period. The diodes D5, D6, D7 and D8 are included to dissipate this residual current but generate additional losses.
The circuit shown in FIG. 1 is complex and requires a significant number of components, as described, eight transistors, eight diodes, two storage capacitors and two inductors. The circuit is complex, expensive and suffers from unnecessary switching losses as a result of the large number of components.
It is desirable to provide a simpler, less expensive circuit that uses fewer components and suffers from fewer losses.
It is also desirable to provide an improved bi-directional switch which can be used in a PDP sustain driver circuit as well as in other applications.